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|Title: ||Bidirectional Integrated Neural Interface for Adaptive Cortical Stimulation|
|Authors: ||Shulyzki, Ruslana|
|Advisor: ||Genov, Roman|
|Department: ||Electrical and Computer Engineering|
|Issue Date: ||15-Feb-2010|
|Abstract: ||This thesis presents the VLSI implementation and characterization of a 256-channel bidirectional integrated neural interface for adaptive cortical stimulation.
The microsystem consists of 64 stimulation and 256 recording channels, implemented in a 0.35um CMOS technology with a cell pitch of 200um and total die size of 3.5mm x3.65mm. The stimulator is a current driver with an output current range of 20uA – 250uA. The current memory in every stimulator allows for simultaneous stimulation on multiple active channels. Circuit reuse in the stimulator and utilization of a single DAC yields a compact and low-power implementation. The recording channel has two stages of signal amplification and conditioning and a single-slope ADC. The measured input-referred noise is 7.99uVrms over a 5kHz bandwidth. The total power consumption is 13.3mW.
A new approach to CMOS-microelectrode hybrid integration by on-chip Au multi-stud-bumping is also presented. It is validated by in vitro experimental measurements.|
|Appears in Collections:||Master|
The Edward S. Rogers Sr. Department of Electrical & Computer Engineering - Master theses
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